Analog and Mixed Signal Layout Engineer

About this job

Lumilens in Bengaluru is hiring an Analog and Mixed Signal Layout Engineer for a full-time role to build critical photonics infrastructure that powers AI supercomputing through advanced optical solutions and high-performance connectivity IPs. In this position, you will be part of a world-class engineering team working on cutting-edge semiconductor technologies. A normal day involves designing and implementing complex analog, mixed-signal, and RF layouts, collaborating with circuit designers to turn schematics into physical implementations from initial floorplanning all the way to tapeout. You will handle physical verification and signoff closure, optimize layouts using extraction results to meet strict performance and reliability targets, and help improve productivity through automation, scripting, and AI-assisted workflows. It is an exciting opportunity to shape the future of compute connectivity.

Responsibilities

• Develop high-speed connectivity IPs using advanced semiconductor process technologies.
• Design and implement complex analog, mixed-signal, and RF layouts including floorplanning, device placement, and routing.
• Collaborate with circuit designers to translate schematics into physical implementations from floorplanning through tapeout.
• Own physical verification and signoff closure covering DRC, LVS, ERC, antenna, DFM, and EMIR.
• Optimize layouts using extraction results to meet performance, matching, noise, and reliability targets.
• Contribute to layout reviews and drive effective layout methodologies and best practices.
• Improve layout productivity and quality via automation, scripting, and AI-assisted workflows.

Requirements

• 5 to 10 years of experience in analog, mixed-signal, RF, or custom layout development.
• Hands-on experience with layouts for SerDes, data converters, clocking circuits, power management, or transceiver building blocks.
• Proven experience in full-custom layout and signoff including RC extraction, DRC, LVS, ERC, DFM, and EMIR.
• Experience with advanced semiconductor technologies like CMOS, FinFET, BiCMOS, or SiGe.
• Strong understanding of semiconductor process technologies, device physics, and layout-dependent effects.
• Proficiency with Cadence Virtuoso and industry-standard EDA tools.
• Ability to work effectively with globally distributed design, verification, CAD, and technology teams.

Good to have

• Exposure to silicon photonics, co-packaged optics, near-package optics, optical transceivers, or high-bandwidth connectivity solutions.
• Experience leveraging automation, scripting, or AI-assisted methodologies for layout productivity.
• Solid understanding of advanced layout techniques like matching, shielding, power planning, and ESD protection.
• Demonstrated success delivering complex layouts through tapeout.

Who should apply

This role suits experienced engineering professionals with 5 to 10 years of background in analog, mixed-signal, RF, or custom layout development within the semiconductor industry. Candidates should have hands-on expertise in full-custom layout, verification, and working with advanced process technologies like FinFET or CMOS. Freshers should not apply, as the position specifically mandates 5-10 years of relevant experience. It is ideal for engineers who thrive in a fast-paced environment and want to impact AI infrastructure.

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