Sr/Staff Engineer, Design Verification,System IP
About this job
Tenstorrent is transforming the computing and AI landscape by building high-performance RISC-V CPUs and advanced AI platforms that unify innovations in software, compilers, platforms, networking, and semiconductors. The company fosters a collaborative environment driven by curiosity and a passion for solving difficult technical challenges. For the Sr/Staff Engineer, Design Verification, System IP role in Bengaluru, the team is expanding to add skilled contributors who can drive quality for cutting-edge technology. On a typical day, a verification engineer focuses on end-to-end verification of the IOMMU IP, ensuring functional correctness and high performance. Responsibilities include building verification environments from the ground up, writing test plans, running simulations, debugging complex design issues, and driving coverage closure. Professionals in this role also collaborate closely with cross-functional teams across architecture, RTL, and validation to streamline the development cycle and improve verification methodologies.
Responsibilities
- Manage end-to-end verification of the IOMMU IP from initial specification understanding to final coverage closure.
- Take ownership of block or subsystem-level verification tasks from test planning through sign-off.
- Build robust verification environments from scratch utilizing SystemVerilog and UVM.
- Debug intricate design and verification issues while analyzing constrained-random verification and regression results.
- Write automation scripts in Python, Perl, TCL, or Bash to enhance workflows and productivity.
- Work alongside architecture, RTL, and validation teams throughout the complete development cycle.
Requirements
- Hands-on background in ASIC or SoC verification using SystemVerilog and UVM.
- Demonstrated experience taking charge of block or subsystem-level verification from test planning to sign-off.
- Thorough understanding of constrained-random verification, coverage analysis, and regression debugging.
- Familiarity with standard bus protocols including AXI, ACE, CHI, or PCIe.
- Scripting proficiency using Python, Perl, TCL, or Bash for automation.
- Ability to build verification environments from scratch and drive coverage closure.
- Compliance with U.S. export-controlled technology and licensing requirements.
Good to have
- Exposure to advanced CPU and memory-management related IPs utilized in AI/ML systems.
- Experience improving verification methodologies and building scalable UVM setups.
- Familiarity with modern verification tools and automation or AI-assisted productivity tools.
Who should apply
This role suits verification professionals with hands-on ASIC or SoC experience who enjoy debugging complex design challenges and building verification environments from scratch. Because Tenstorrent welcomes candidates at various experience levels and assesses levels during the interview process, individuals with relevant technical backgrounds are encouraged to apply. Applicants must also be mindful of U.S. export-controlled technology requirements and citizenship or residency eligibility criteria.
Frequently asked questions
What is the primary responsibility of the Sr/Staff Engineer, Design Verification, System IP at Tenstorrent?
The role focuses on the end-to-end verification of the IOMMU IP, ensuring functional correctness, and managing the process from specification understanding to final coverage closure.
Where is the Sr/Staff Engineer, Design Verification, System IP position located?
This hybrid position is based out of Bengaluru, India, at Tenstorrent.
What technical skills are needed for the Sr/Staff Engineer, Design Verification, System IP role?
Candidates need hands-on background in ASIC or SoC verification using SystemVerilog and UVM, knowledge of bus protocols like AXI, ACE, CHI, or PCIe, and scripting skills in Python, Perl, TCL, or Bash.
Are compliance requirements tied to employment at Tenstorrent for this role?
Yes, the offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology and meeting related citizenship or residency status requirements.
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